# 11.7 LG XGK FEnet Ethernet

Supported Series: LS XGT series XGK CPU with XGL-EFMT Ethernet module

**HMI settings**

| **Items**  | **Settings**           | **Note** |
| ---------- | ---------------------- | -------- |
| Protocol   | LG XGK FEnet(Ethernet) |          |
| Connection | Ethernet               |          |
| Port No.   | 2004                   |          |

**Address list**

| **Type** | **Register** | **Range** | **Format** | **Note**             |
| -------- | ------------ | --------- | ---------- | -------------------- |
| Word     |              |           |            |                      |
|          | P            | 0\~2047   | P d        |                      |
|          | M            | 0\~2047   | M d        |                      |
|          | K            | 0\~2047   | K d        |                      |
|          | F            | 0\~2047   | F d        |                      |
|          | T            | 0\~2047   | T d        |                      |
|          | C            | 0\~2047   | C d        |                      |
|          | Z            | 0\~127    | Z d        |                      |
|          | S            | 0\~127    | S d        |                      |
|          | L            | 0\~11263  | L d        |                      |
|          | N            | 0\~21503  | N d        |                      |
|          | D            | 0\~32767  | D d        |                      |
|          | R            | 0\~32767  | R d        |                      |
|          | ZR           | 0\~65535  | ZR d       |                      |
|          | UxDD         | 0\~6331   | UxDD nndd  | nn: 0\~63, dd: 0\~31 |

✎**Note:**

1\) In addition to the "UxDD" register, the others correspond to the PLC register one by one. UxDD corresponds to U in the PLC;

2\) The \[UxDD] register, defined in the PLC is Ux.dd, x represents the block, and dd represents 0-31 of each block. There are 64 blocks in the PLC;

3\) All bit registers are in the form of bits in word, and the range is the same as the word register;

**Communication settings in HMI**

1\) Enable HMI Ethernet in \[Project Settings];

![](https://3950998874-files.gitbook.io/~/files/v0/b/gitbook-legacy-files/o/assets%2Fpi-series-user-manual%2F-LvOARVDUquBWPGwbaR_%2F-LvOAjbCecRYX7P6FXD3%2F0.png?generation=1575601765627655\&alt=media)

2\) Set PLC IP in \[Device IP] settings;

![](https://3950998874-files.gitbook.io/~/files/v0/b/gitbook-legacy-files/o/assets%2Fpi-series-user-manual%2F-LvOARVDUquBWPGwbaR_%2F-LvOAjbDfaRPPtVpHvyW%2F1.png?generation=1575601765508669\&alt=media)

**Communication cable**

![](https://3950998874-files.gitbook.io/~/files/v0/b/gitbook-legacy-files/o/assets%2Fpi-series-user-manual%2F-LvOARVDUquBWPGwbaR_%2F-LvOAjbEHVs2aL29V1y6%2F2.png?generation=1575601765628279\&alt=media)